Conventionally, a recordable optical recording medium has a track groove formed in advance, and data is recorded along the track groove, namely, on the track groove or on an area sandwiched between the track grooves (land). The track groove winds like a sine wave, and the data is recorded in synchronization with a recording clock signal which is generated based on a wobble cycle of the sine wave. A clock signal synchronized to a wobble cycle is generally generated using a PLL (Phase Locked Loop) (see, for example, Patent Document 1).
In order to record data at a prescribed position on a recording surface of the optical disc medium, an ADIP (Address in Pregroove) is formed along the track groove. Known methods for writing address information include a PSK (Phase Shift Keying) modulation system and an MSK (Minimum Shift Keying) modulation system (see, for example, Patent Document 2).
For reproducing data recorded on the track, the PLL generates a reproduction clock signal synchronized to a data signal which is included in a reproduction signal from the optical disc medium. The data signal is digitized in synchronization with the reproduction clock signal, and data is reproduced from the digital data (see, for example, Patent Document 3).
FIG. 22 is a block diagram showing an optical disc device for making a recording access and a reproduction access. An optical disc medium 100 has a wobbling track, and data is recorded on the track. An optical head section 101 directs laser light toward the optical disc medium 100 and detects an amount of the light reflected by the optical disc medium 100 to output an electric signal. An analog signal processing section 104 extracts a wobble signal, a data signal and a servo error signal from the electric signal.
A motor 102 rotates the optical disc medium 100. A servo circuit 103 controls the position to which the optical head section 101 directs the laser light and the rotation rate of the motor 102 based on a servo error signal.
A reproduction signal processing circuit 207 generates a recording clock signal and a reproduction clock signal from a wobble (WBL) signal, detects address information, generates a reproduction clock signal from a data signal (RF signal), and reproduces user data. An ADIP reproduction section 213 detects an ADIP recorded by the PSK modulation system or the MSK modulation system and reproduces address information.
Based on the address information reproduced by the reproduction signal processing circuit 207, a recording and reproduction timing control section 208 controls a timing for recording data on the optical disc medium 100 and a timing for reproducing data from the optical disc medium 100. A CPU 209 controls recording and reproduction operations of the optical disc device via the recording and reproduction timing control section 208.
A data modulation section 106 modulates user data to be recorded on the optical disc medium 100. A power control section 105 controls the power of the laser light from the optical head section 101. For recording, the power control section 105 controls the power of the laser light in accordance with the data signal which is output by the data modulation section 106.
Next, the reproduction signal processor 207 will be described in more detail. The reproduction signal processor 207 receives a wobble signal WBL and a data signal RF from the analog signal processing section 104, and outputs address information to the recording and reproduction timing control section 208. Based on the address information, the recording and reproduction timing control section 208 outputs a timing signal representing the reproduction timing to a data reproduction section 219. In accordance with the timing signal, the data reproduction section 219 reproduces user data.
The reproduction signal processor 207 includes an A/D converter 211 for performing analog/digital conversion of a wobble signal, a PLL circuit 212 for generating a clock signal synchronized to the wobble signal, an ADIP reproduction section 213, an A/D converter 214 for performing analog/digital conversion of a data signal, an AGC circuit 215, a PLL circuit 216 for generating a clock signal synchronized to the data signal, a PR equalization filter 217, a viterbi decoding section 218, and a data reproduction section 219.
The A/D converter 211 samples a wobble signal WBL in synchronization with the clock signal generated by the PLL circuit 212. The ADIP reproduction section 213 detects a wobble modulation mark by the MSK modulation system from a digital wobble signal obtained by the sampling and reproduces address information. The A/D converter 214 samples a data signal RF in synchronization with the clock signal generated by the PLL circuit 216, and the sampled data signal is input to the equalization filter section 217.
The AGC circuit 215 feeds amplitude error information back to the analog signal processing section 104 and performs a control such that the amplitude of a data signal to be input to the A/D converter 214 is kept constant. The PR equalization filter section 217 performs a desired partial response equalization on a digital data signal synchronized to the clock signal generated by the PLL circuit 216, using a coefficient obtained by equalization coefficient optimization processing by an adaptive equalization algorithm. The viterbi decoding section 218 performs likelihood decoding in accordance with the type of the partial response performed by the PR equalization filter section 217 and outputs a data binary signal. The data reproduction section 219 demodulates the data binary signal in accordance with a prescribed modulation system at the timing specified by the recording and reproduction timing control section 208, performs error correction processing and outputs reproduction user data.
Next, technologies used for the PR equalization filter section 217 and the viterbi decoding section 218 will be described.
Conventionally, in an information reproduction device for reproducing information recorded on a recording medium such as an optical disc medium or the like, a slice system has been adopted. According to the slice system, when the wave level of a signal is determined as “1” when being higher than a prescribed value and determined as “0” when being lower than the prescribed value. However, with this system, it is difficult to reproduce data at high reliability for a recording medium having a significantly improved recording density. Accordingly, a PRML (Partial Response Maximum Likelihood) system capable of reproducing data at high reliability has recently been a target of attention. The PRML system is used as a high density signal processing technology for recording mediums such as an HDD (hard disc drive), a camera-integrated VTR capable of digital recording, a recordable and rewritable optical disc medium and the like. As the recording density is improved, it is now strongly required to decode data accurately from a reproduction signal having a low S/N (signal to noise) ratio or a nonlinear reproduction signal. There are various PR systems, and a PR system suitable to the characteristics of each transmission path needs to be selected. In a reproduction transmission path of an optical disc medium or the like, PR(1,2,2,1) characteristic is occasionally adopted, for example.
FIG. 23 is a block diagram showing the PR equalization filter section 217. The filter shown in FIG. 23 is referred to as a transversal filter or an FIR (Finite Impulse Response) filter. The PR equalization filter section 217 generally includes a plurality of delay elements 300 through 305, a plurality of multipliers 306 through 312 for multiplying outputs from the delay elements 300 through 305 by a plurality of equalization coefficients (coefficients P through V) for realizing a desired PR characteristic, and an adder 313 for adding together outputs from the plurality of multipliers 306 through 312.
In order to realize equalization to a desired PR characteristic with high precision, a technology of automatically performing an adaptation control on an equalization coefficient (tap) of the FIR filter is adopted. This technology is effective to various stresses at the time of reproduction (tilt of the disc, defocus of the laser light, off-track of the optical head section, etc.). Many algorithms for the adaptation control are known, for example, an LMS (Least-Mean Square) algorithm, a Normalized LMS algorithm, an RLS (Recursive Least Square) algorithm, a projection algorithm, a neural network algorithm and the like.
Now, an adaptive wave equalizer using the LMS algorithm will be described briefly. This algorithm requires a temporary determination value used in LMS in order to calculate an adaptive equalization coefficient. The LMS algorithm is a feedback operation of minimizing the square error between the “desirable response” and the “response of the transmission path”. The “desirable response” is a PR equalization target value. The “response of the transmission path” is a digital reproduction signal which is input from the FIR filter and equalized to have a PR frequency characteristic. In the LMS algorithm, a signal, which is obtained in a block of performing an adaptation control on the FIR filter coefficient and represents the difference between the temporary determination value and the post-equalization digital reproduction signal value, is referred to as an “equalization error signal”.
The block of performing an adaptation control on the FIR filter coefficient updates the FIR filter equalization coefficient when necessary, in order to minimize the square value of the equalization error signal. This is referred to as “adaptive equalization”. An expression for setting the equalization coefficient of LMS is represented by expression (1) as follows (see, for example, Patent Document 4).w(n(T+1))=w(nT)+A·e(nT)·x(nT)  expression (1)
(where T=0, 1, 2, 3, . . . )
w(nT) is the current coefficient, w(n(T+1)) is the updated coefficient, A is the tap gain, e(nT) is the equalization error, and x(nT) is the signal input to the FIR filter. n is the parameter for selecting the updating cycle of the coefficient. The equalization coefficient of the FIR filter is updated as represented by expression 1.
Patent Document 1: Japanese Laid-Open Patent Publication No. 2000-113597
Patent Document 2: Japanese Laid-Open Patent Publication No. 2004-134009
Patent Document 3: Japanese Laid-Open Patent Publication No. 2000-100083
Patent Document 4: Japanese Laid-Open Patent Publication No. 2003-85764
Patent Document 5: Japanese Laid-Open Patent Publication No. 2001-250341
Patent Document 6: Japanese Laid-Open Patent Publication No. 2003-141823